AMD has introduced its next generation Opteron processor, codenamed 'Shanghai'.
The company claims the new quad-core part offers up to 35 per cent more performance than the previous 'Barcelona' at the same power envelope and price point, and 20 per cent faster clock-for-clock. It is pin compatible with previous generations chipsets, retaining Socket F compatibility.
At a pre-briefing, Pat Patla, director of AMD's workstation and server divisions, told IT PRO, that the unveiling of Shanghai would be very different to last year's Barcelona launch, which was hit by major delays due to the initial spin containing a error.
"Barcelona was not a timely launch, and it had a lot of features," Patla admitted, implying that the design was too much for AMD to get right at first hit.
"[Therefore] in January, we made sure we didn't have another Barcelona," Patla said, observing that the "heavy lifting" AMD had done with the Barcelona made the transition to Shanghai easier.
"Shanghai healed the wounds of Barcelona," he said, proudly making the claim that Shanghai was, "the fastest ramping product in Opteron history". He said this was achieved by reducing tape-outs, where designs of the processor are sent to manufacture.
Five versions are appearing at launch ranging from 2.3GHz up to 2.7GHz. The former will cost $377 in trays of 1,000, while the top-end part will cost $989. However, Patla said that AMD believed that it had been aggressive with pricing. However, he also candidly admitted that, "nobody buys our high-end parts".
Each of the parts released today has a 75W TDP, but 55W and 105W variations are due to follow early next year.
For Shanghai, Level 3 cache has been increased to 6MB, up from 2MB, while system memory and the integrated memory controller talk to each other via AMD's HyperTransport technology, delivering up to 17.6GB/s, using 800MHz DDR2 memory.
Patla said the new processor had been designed with virtualisation applications in mind, a use that has increasing importance in the current economic climate, as companies looked to reduce power consumption.
Delving into the architecture of the chip, Patla stated that the reason for Shanghai's suitability for virtualisation was down to AMD's Rapid Virtualization Indexing (RVI) technology and the presence of Enhanced Tagged TLB's (Translation Lookaside Buffers). TLB's are areas of fast cache memory of the processor that are used to store virtual addresses, used frequently by virtual machines.
"It's no secret that we work closely with VMWare," Patla admitted. He also claimed though that Microsoft's Hyper-V platform ran 12 per cent quicker on AMD, compared to Intel.
Patla also made the surprising revelation that Microsoft's cloud computing project Azure was developed exclusively on AMD hardware, due to what he claimed was AMD's superiority when dealing with Nested Page Tables, a core feature of virtualisation.
Other key technologies Patla highlighted was the use of Immersion Lithography, which enabled AMD to get to a 45nm manufacturing process, the yields from which Patla said AMD was very happy with.
It also enables Shanghai to deliver its increased performance per watt and up to 35 per cent lower idle power compared to its predecessor. In addition Smart Fetch technology was highlighted as delivering up to 21 per cent power savings, through more efficient use of the cache.
Patla said that the benefits of the new architecture were highlighted by benchmark results, claiming record-setting Java performance with the 2.7GHz Shanghai part up against a 3GHZ Intel E5450 HarperTown' Xeon, while also beating it for floating-point and memory bandwidth.
At launch AMD said that "Shanghai ready platforms would be available from Dell, HP, Sun, IBM, Fujitsu Siemens and Cray".
