Intel is partnering with Micron to launch three bit per cell (3bpc) multi-level cell (MLC) NAND flash by the end of the year.
The companies claimed the chip measures only 126mm square and that its capacity of 32Gb makes it the smallest and most efficient in today's market.
Having three bits per cell increases the density of the flash in a small chip, meaning less room is required for larger storage.
Randy Wilhelm, vice president of Intel's NAND Solutions Group, said in a statement: "The move to 3bpc is yet another proof point to the remarkable progress Intel and Micron have made in 34-nm NAND development."
"This milestone sets the stage for continued silicon leadership on 2xnm process that will help decrease costs and increase the capabilities of our NAND solutions for our customers."
The two firms have developed NAND flash technology together since 2005 but this is the first they have done together using 34nm lithography.
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